1. Introduction
2. 1. CPU
3. 1. 1.1. Encoding of the "branch-zero" instructions (BLTZ/BGEZ/BLTZAL/BGEZAL)
   2. 1.2. Unaligned loads and stores (LWL/SWL and LWR/SWR)
   3. 1.3. Load Cancelling
   4. 1.4. Manual Errata
4. References